Lista das Publicação do GME

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Internacional


Publicações em Periódicos Publicações em Congressos Livros Capítulos de Livros Revistas Conferências Outros

Publicações em Periódicos ↑ Voltar ao topo

FLORES FILHO, A. F., SUZIM, A. A., SILVEIRA, M. A., KANO, Y. Study, Development, Analysis and Tests of a Multiphase Electromagnetic Planar Actuator . Trasactions Iee Of Japan. , 2002.

CALVANO, J. V., ALVES, V. C., LUBASZEWSKI, M. S., MESQUITA FILHO, A. C. Synthesis Method for Testable Electrical Networks using 1st Order Building Blocks. Microelectronics Journal. , 2002. NACUL, A., CARRO, L., JANNER, D., LUBASZEWSKI, M. S. Testing of RF Mixers with Adaptive Filters. Microelectronics Journal. , 2002.

CASSOL, L. J., BETAT, O., CARRO, L., LUBASZEWSKI, M. S. The Sigma-Delta-Bist Method Applied to Linear Analog Circuits. Journal of Electronic Testing: Theory and Applications. Dordrecht: , 2002.

ITO, S., CARRO, L., JACOBI, R. Sashimi and FemtoJava: making Java work for microcontroller applications. IEEE Design & Test of Computers. Estados Unidos: , p.100 - 110, 2001.

COTA, �., LIMA, F. G., REZGUI, S., CARRO, L., VELAZCO, R., LUBASZEWSKI, M., REIS, R. Synthesis of an 8051-like Micro-controller Tolerant to Transient Faults. Journal of Electronic Testing: Theory and Applications. Estados Unidos: , v.17, n.2, p.149 - 161, 2001.

CALVANO, J. V., MESQUITA FILHO, A. C., ALVES, V. C., LUBASZEWSKI, M. S. Fault Models and Test Generation for OpAmp Circuits - The FFM. Journal of Electronic Testing: Theory and Applications. Dordrecht: , v.17, n.2, p.121 - 138, 2001.

COTA, E. F., LIMA, F. G., REZGUI, S., CARRO, L., VELAZCO, R., LUBASZEWSKI, M. S., REIS, R. Synthesis of an 8051-Like Microcontroller Tolerant to Transient Faults. Journal of Electronic Testing: Theory and Applications. Dordrecht: , v.17, n.2, p.149 - 162, 2001.

INDRUSIAK, L., REIS, R. A. L. 3D Integrated Circuit Layout Visualization using VRML. Future Generation Computer Systems. Inglaterra: , v.17, n.5, p.503 - 511, 2001.

COTA, �. F., LIMA, F., REZGUI, S., CARRO, L., VELAZCO, R., LUBASZEWSKI, M., REIS, R. A. L. Synthesis of an 8051-like Micro-Controller Tolerant to Transient Faults. Journal of Electronic Testing, Theory and Applications. Holanda: , v.17, n.2, p.149 - 161, 2001.

SUZIM, A. A., FLORES FILHO, A. F., SILVEIRA, M. A. Application of Neodymium-Iron-Boron Permanent Magneys on the Assembling of a Novel Planar Actuator. IEEE Transactions on Magnetics. Estados Unidos: , v.35, n.5,p.4034 - 4036, 1999.

MAR�AL, R. F. M., NEGREIROS, M., SUZIM, A. A., KOVALESKI, J. L. Detecting Faults in Rotating Machines. Ieee Instrumentation Measurement Magazine. New York-USA:v.3, n.4, p.24 - 26, 2000.

LIMA, F. G., JOHANN, M. O., G�NTZEL, J. L. A., D'�VILA, E., CARRO, L., REIS, R. A. L. Designing a Masked Programmable Matrix for Sequential Circuits In: VLSI: Systems on a Chip ed.Boston : Kluwer Academic Publishers, 2000

G�NTZEL, J. L. A. Estilos de Projeto In: Sistemas Digitales: S�ntese F�sica de Circuitos Integrados.1 ed.Bogot� : Ediciones Uniandes y programa CYTED, 2000 Livros Organizados

COTA, �., NEGREIROS, M., CARRO, L., LUBASZEWSKI, M. A New Adaptive Analog test and Diagnosis System. IEEE Transactions on Instrumentation and Measurement. , v.49, n.2, p.223 - 227, 2000.

COTA, E., NEGREIROS, M., CARRO, L., LUBASZEWSKI, M. A new adaptive analog test and diagnosis system. IEEE Transactions on Instrumentation and Measurement. Piscaraway, NJ: , 2000.

COTA, �. F., NEGREIROS, M., CARRO, L., LUBASZEWSKI, M. S. A New Adaptive Analog Test and Diagnosis System. IEEE Transactions on Instrumentation and Measurement. Los Alamitos - CA, USA: , 2000.

LUBASZEWSKI, M. S., MIR, S., KOLAR�K, V., NIELSEN, C., COURTOIS, B. Design Of Self-Checking Fully Differential Circuits And Boards. IEEE Transactions on VLSI Systems. Los Alamitos - CA, EUA: , v.8, n.2, 2000.

RIBAS, R. P., LESCOT, J., LECLERCQ, J. L., KARAM, J. M., NDAGIJIMANA, F. Micromachined Microwave Planar Spiral Inductors and Transformers. IEEE Transactions on Microwave Theory and Techniques. , v.48, n.8, p.1326 - 1335, 2000.

V.M.RODRIGUES, F.R.WAGNER A Logic for Synchronous Transitions with Dynamic Conflict Detection. CLEI Electronic Journal. , v.3, n.2, 2000.

Livros ↑ Voltar ao topo

RICHARDSON, A., RUEDA, A., HUERTAS, J., LUBASZEWSKI, M. S. Analog and Mixed-Signal Design for Testability.1 ed. Londres : John Wiley and Sons Ltd., 2002, v.1.

REIS, R. A. L. Sistemas Digitales:S�ntese F�sica de Circuitos Integrados.1 ed. Bogot� : CYTED- Uniandes, 2000, v.1. p.373.

SUZIM, A. A. Metodologia de Projeto In: Sistema Digitales - S��ntese F��sica de Circuitos Integrados.1 ed.Bogot� : CYTED, 2000.

Publicações em Congressos ↑ Voltar ao topo

CORTES, F. P., CARRO, L., GIRARDI, A., SUZIM, A. A. A Sigma-delta AD converter insensitive to SEU effects In: International On-line Testing Workshop, 2002, Isle of Bendor. International On-line Testing Workshop. , 2002.

SUZIM, A. A., NEGREIROS, M., CARRO, L. An All Digital, On-line Analog Test (aceito) In: International On-line Testing Workshop, 2002, Isle of Bendor. International On-line Testing Workshop. , 2002.

SOUZA JR, A., NEGREIROS, M., CARRO, L., SUZIM, A. A. Complex Adaptive Signal Processing for Analog Testing In: 3rd IEEE Latin-American Workshop, 2002, Montevideo. Proceedings 3rd IEEE Latin-American Workshop. , 2002. p.166 - 173

SUZIM, A. A., NEGREIROS, M., CARRO, L. Testing Analog Circuits Using Spectral Analysis In: 8th International Mixed-Signal Testing Workshop, 2002, Montreux. 8th International Mixed-Signal Testing Workshop. , 2002.

GONSALES, A., LUBASZEWSKI, M. S., CARRO, L., RENOVELL, M. A New FPGA for DSP Applications Integrating BIST Capabilities In: IEEE Latin-American Test Workshop, 2002, Montevideo. LATW2002 - Digest of Papers. , 2002. p.76 - 81

AZA�S, F., BERTRAND, S., COMPTE, M., RENOVELL, M., LUBASZEWSKI, M. S. Estimating Static Parameters of A-to-D Converters from Spectral Analysis In: IEEE Latin-American Test Workshop, 2002, Montevideo. LATW2002 - Digest of Papers. , 2002. p.174 - 179

CALVANO, J. V., ALVES, V. C., LUBASZEWSKI, M. S., MESQUITA FILHO, A. C. Filters Designed for Testability Wrapped on the Mixed-Signal Test Bus In: IEEE VLSI Test Symposium, 2002, Monterrey. IEEE VLSI Test Symposium. Los Alamitos - CA, USA: IEEE Computer Society Press, 2002.

COTA, �. F., CARRO, L., ORAILOGLU, A., LUBASZEWSKI, M. S. Generic x Detailed Search for TAM Definition in Core-based Systems In: IEEE Latin-American Test Workshop, 2002, Montevideo. LATW2002 - Digest of Papers. , 2002. p.160 - 164

COTA, �. F., CARRO, L., LUBASZEWSKI, M. S., ORAIROGLU, A. Test Planning and Design Space Exploration in a Core-based Environment In: Design, Automation and Test in Europe Conference, 2002, Paris. Design, Automation and Test in Europe Conference. Los Alamitos - CA, USA: IEEE Computer Society Press, 2002.

BEROULLE, V., BERTRAND, Y., LATORRE, L., NOUET, P., LUBASZEWSKI, M. S., RIBAS, R. Testing Resonant Micro-Electro-Mechanical Sensors using the Oscillation-based Test Methodology In: IEEE Latin-American Test Workshop, 2002, Montevideo. LATW2002 - Digest of Papers. , 2002. p.99 � 104.

NDRUSIAK, L., GLESNER, M., REIS, R. A. L. Collaborative Learning by Sharing Design Experience In: 4th European Workshop on Microelectronics Education - EWME, 2002, Vigo. Proceedings. , 2002.

INDRUSIAK, L. S., GLESNER, M., REIS, R. A. L. Comparative Analysis and Application of Data Repository Infraestructure for Collabarotion-enable Distributed Design Enviroments In: DATE2002- Design, Automation and Test in Europe:Designer�s Forum, 2002, Paris. Proceedings DATE 2002. Los Alamitos: IEEE Computer Society, 2002. v.1. p.1130

LIMA, F., CARRO, L., VELAZCO, R., REIS, R. A. L. Injecting Multiple Upsets in a SEU Tolerant 8051 Micro Controler In: 3 Latin- American Test Workshop - LATW, 2002, Montevideu. Proceedings LATW 2002. , 2002. v.1. p.120 - 125

BRISOLARA, L., INDRUSIAK, L. S., REIS, R. A. L. Modelagem Orientada de Primitivas de Projeto de Sistemas Eletronicos para Colabora��o In: Oitavo Workshop Iberchip, 2002, Guadalajara. Proceedings Oitavo Workshop Iberchip. , 2002.

SAWICKI, S., INDRUSIAK, L., REIS, R. A. L. Projeto Cooperativo no Ambiente CAVE In: Oitavo Workshop Iberchip, 2002, Guadalajara. Proceedings Oitavo Workshop Iberchip. , 2002.

BARCELOS, M., PANATO, A., REIS, R. A. L. Um IP de Criptografia Padr�o Rijdael para Projeto em FPGA In: Oitavo Workshop Iberchip, 2002, Guadalajara. Proceedings Oitavo Workshop Iberchip. , 2002. v.1. p.000 - 000

GIRARDI, A., MENEZES, C., LAZZARI, C., CORTES, F. P., BRITO, J., HENTSCHKE, R., UBIRATAN, R., REIS, R. A. L. Um hardware OP para Criptografia no Padr�o AES-Rijandael In: Oitavo Workshop Iberchip, 2002, Guadalajara. Proceedings Oitavo Workshop Iberchip. , 2002.

G�NTZEL, J. L. A., PINTO, A. C. M., REIS, R. A. L. A Timed Calculus for ATG-Based Timing Analysis of Circuits with Complex Gates In: 2nd IEEE Latin American Test Workshop, 2001, Canc�n. 2nd IEEE Latin American Test Workshop. Puebla, M�xico: National Institute for Astrophysics, Optics and Electronics (INAOE), 2001. p.234 - 239

COTA, �., CARRO, L., LUBASZEWSKI, M. An Effective Test Method for Digital Neural Networks In: IEEE Internacional Joint INNS-IEEE Conference on Neural Networks, 2001, Washington. An Effective Test Method for Digital Neural Networks. Dispon�vel em meio magn�tico, 2001.

CARRO, L., NACUL, A., JANNER, A., LUBASZEWSKI, M. Built-in Test of Analog Non-linear Circuits in a SOC environment In: 9th IFIP VLSI-SOC'01, 2001, Montpellier. Built-in test of analog non- linear circuits in a SOC environment. , 2001.

COTA, �., BRISOLARA, L., CARRO, L., LUBASZEWSKI, M., SUZIM, A. MET: A Microprocessor for Embedded Test In: 5th IEEE International Workshop on Testing Embedded Core-based Systems, 2001, Marina Del Rey. MET: A Microprocessor for Embedded Test. Los Alamitos: IEEE Computer Society Press, 20

LIMA, F. G., REZGUI, S., CARRO, L., VELAZCO, R., REIS, R. On th Use of VHDL Simulation and Emulation to Derive Error Rates In: RADECS 2001, 2001, Grenoble. On the Use of VHDL Simulation and Emulation to Derive Error Rates. , 2001.

CARRO, L., COTA, E., LUBASZEWSKI, M., BERTRAND, Y., AZAIS, F., RENOVELL, M. TI-BIST: A Temperature Independent Analog BIST for Switched-Capacitor Filters In: IEEE Asian Test Symposium , ATS 2000, 2000, Taipei. TI-BIST: A Temperature Independent Analog BIST for Switched-Capacitor Filters. Los Alamitos: IEEE Computer Society Press, 2001. p.78 - 83

CASSOL, L., BETAT, O., CARRO, L., LUBASZEWSKI, M. The Sigma-Delta-Bist Method Applied to Linear Analog Circuits In: 2nd IEEE Latin-American Test Workshop, 2001, Cancun. The Sigma-Delta-Bist Method Applied to Linear Analog Circuits. Los Alamitos: IEEE Computer Society Press, 2001. p.126 - 130

NACUL, A., CARRO, L., JANNER, D., LUBASZEWSKI, M. S. A BIST Procedure for Analog Mixers in Software Radio In: SBCCI2001 - 14th Symposium on Integrated Circuits and Systems, 2001, Piren�polis, Goi�s. SBCCI2001 - 14th Symposium on Integrated Circuits and Systems. Los Alamitos, Calif�rnia: IEEE Computer Society Press, 2001. p.103 - 108

NACUL, A., CARRO, L., JANNER, D., LUBASZEWSKI, M. S. A BIST procedure for Analog Mixers in Software Radio In: SBC Symposium on Integrated Circuits and Systems Design, 2001, Piren�polis. 14th Symposium on Integrated Circuits and Systems Design. Los Alamitos - CA, USA: IEEE Computer Society Press, 2001.

COTA, E. F., CARRO, L., LUBASZEWSKI, M. S. A Test Method for Digital Signal Processors In: 2nd IEEE Latin American Test Workshop, 2001, Canc�n. 2nd IEEE Latin American Test Workshop - Digest of Papers. , 2001. p.214 � 219.

COURTOIS, B., MIR, S., CHARLOT, B., LUBASZEWSKI, M. S. An Analog-Based Approach for MEMS Testing In: 2nd IEEE Latin American Test Workshop, 2001, Canc�n. 2nd IEEE Latin American Test Workshop - Digest of Papers. , 2001. p.200 - 203

COTA, E. F., CARRO, L., LUBASZEWSKI, M. S. An Effective Test Method for Digital Neural Networks In: INNS-IEEE 2001 International Joint Conference on Neural Networks, 2001, Washington D.C.. INNS-IEEE 2001 International Joint Conference on Neural Networks. Los Alamitos, Calif�rnia: IEEE Computer Society Press, 2001.

NACUL, A., CARRO, L., JANNER, D., LUBASZEWSKI, M. S. Built-In Test of Analog Non-Linear Circuits in a SOC Environment In: XIIIth IFIP VLSI-SOC, 2001, Montpellier. IFIP VLSI-SOC. , 2001. Palavras-chave : Autoteste Integrado, Circuitos n�o-lineares, Filtros adaptativos, Sistemas Integrados

NACUL, A., CARRO, L., JANNER, D., LUBASZEWSKI, M. S. Built-in Test of Analog Non-Linear Circuits in a SOC Environment In: XIth IFIP VLSI-SOC, 2001, Montpellier. XIth IFIP VLSI-SOC. Dordrecht, Holanda: Kluwer Academic Publishers, 2001.

CALVANO, J. V., ALVES, V. C., LUBASZEWSKI, M. S., MESQUITA FILHO, A. C. Designing Testable Networks for Transfer Function Realization In: 2nd IEEE Latin American Test Workshop, 2001, Canc�n. 2nd IEEE Latin American Test Workshop - Digest of Papers. , 2001. p.84 - 87

CALVANO, J. V., MESQUITA FILHO, A. C., ALVES, V. C., LUBASZEWSKI, M. S. Filter Sensitivity Analysis Using the TRAM In: 2nd IEEE Latin American Test Workshop, 2001, Canc�n. 2nd IEEE Latin American Test Workshop - Digest of Papers. , 2001. p.80 - 83

COTA, E. F., BRISOLARA, L., CARRO, L., SUSIN, A., LUBASZEWSKI, M. S. MET: An Embedded Processor for Test Controlling In: IEEE International Workshop on Testing Embedded Core-based System-Chips, 2001, Marina Del Rey. IEEE International Workshop on Testing Embedded Core-based System-Chips. , 2001.

CALVANO, J. V., ALVES, V. C., MESQUITA FILHO, A. C., LUBASZEWSKI, M. S. Synthesizing Testable Electrical Networks with 1st order building blocks In: IEEE Mixed-Signal Testing Workshop, 2001, Atlanta. 7th IEEE Mixed-Signal Testing Workshop. , 2001.

NACUL, A., CARRO, L., JANNER, D., LUBASZEWSKI, M. S. Testing of RF Mixers with Adaptive Filters In: IEEE Mixed-Signal Testing Workshop, 2001, Atlanta. 7th IEEE Mixed-Signal Testing Workshop. , 2001.

CASSOL, L. J., BETAT, O., CARRO, L., LUBASZEWSKI, M. S. The Sigma-Delta BIST Method Applied to Linear Analog Circuits In: 2nd IEEE Latin American Test Workshop, 2001, Canc�n.2nd IEEE Latin American Test Workshop - Digest of Papers. , 2001. p.126 - 130

AGOSTINI,Luciano , STEMMER, G., BAMPI, S., REIS, R. A. L. A Dedicated 20x3 bit Multiplier Using the Recoding Principli for Echo Cancellation In: DATE2001- Design, Automation and Test in Europe:Designer�s Forum, 2001, Munich. DATE2001- Design, Automation and Test in Europe:Designer�s Forum. DATE, 2001. v.1. p.73 - 76

LIMA, F., CARMICHAEL, C., FABULA, J., PADOVANI, R., REIS, R. A. L. A Fault Injection Analysis of Virtex FPGA TMR Design Methodology In: RADECS - Radiation and its Effects on Components and Systems, 2001, Grenoble. Proceedings RADECS 2001. , 2001. v.1. p.000 - 000

GUNTZEL, J. L., PINTO, A., REIS, R. A. L. A Timed calculus for ATG-based timing Analysis with Complex Gates In: LATW2001- 2nd Latin-American Test Workshop, 2001, Cancun.LATW2001- 2nd Latin-American Test Workshop. Computer Society, 2001. v.2. p.234 - 239

INDRUSIAK, L. S., BECKER, J., GLESNER, M., REIS, R. A. L. Distributed Collaborative Design over Cave2 Framework In: VLSI-soc 2001, 2001, Montpellier. Proceedings VLSI-SOC 2001. , 2001. v.1.

HERNADEZ, E., SAWICKI, S., INDRUSIAK, L. S., REIS, R. A. L. Homero-Um Editor VHDL Cooperativo Via Web In: VII Workshop Iberchip, 2001, Montevid�u. Proceedings VII Workshop Iberchip. , 2001. v.1. p.21 - 23

LIMA, F., CARMICHAEL, C., FABULA, J., PADOVANI, R., REIS, R. A. L. On the Use of VHDL Simulation and Emulation to Derive Error Rate In: RADECS - Radiation and its Effects on Components and Systems, 2001, Grenoble. Proceedings RADECS 2001. , 2001. v.1. p.000 - 000

B.A.MELLO, F.R.WAGNER A Standardized Co-Simulation Backbone In: 11th IFIP Conference on VLSI-SoC, 2001, Montpellier. VLSI-SoC. Boston: Kluwer Academic Publishers, 2001. p.11 - 16

D.F.WILDT, F.R.WAGNER Adapting Simulation Environments to HLA: A Case Study In: ESM'2001 - 15th European Simulation Multiconference, 2001, Praga. PROCEEDINGS. Society for Computer Simulation, 2001. p.601 - 605

J.C.OTERO, F.R.WAGNER An Object-Oriented Methodology for Modeling the Precise Behavior of Processor Architectures In: 11th IFIP Conference on VLSI-SoC, 2001, Montpellier. VLSI- SoC. Boston: Kluwer Academic Publishers, 2001. p.370 - 375

ZIMMERMANN, F. L. O., SUZIM, A. A. A Microprocessor with Analog Capabilities In: 6TH IEEE INTERNATIONAL MIXED-SIGNAL TESTING, 2000, Montpellier. 6TH IEEE INTERNATIONAL MIXED-SIGNAL TESTING. , 2000. v.1. p.214 - 218

RIZZI, R. L., DORNELES, R. V., ZEFERINO, C. A., DIVERIO, T. A., NAVAUX, P. O. A., SUZIM, A. A., BAMPI, S. Fluvial Flow of the Guaíba River - A Parallel Solution for the Shallow Water Equations Model In: VecPar-International Meeting on Vector and Parallel Processing, 2000, Porto.International Meeting on Vector and Parallel Processing. , 2000. v.3. p.885 - 896

BENSABAA, K., SUZIM, A. A. Image Analysis in Histological Sections - Segmentation and Quantification of Tumor Angiogenesis Areas In: 2000 International Conference on Imaging Science, Systems, and Technology, 2000, Las Vegas. CISST'2000 - 2000 International Conference on Imaging Science, Systems, and Technology. , 2000.

DORNELES, R. V., RIZZI, R. L., ZEFERINO, C. A., DIVERIO, T. A., NAVAUX, P. O. A., SUZIM, A. A., BAMPI, S. Parallel Solution for the Shallow Water Equations Using the Data Decomposition In: Workshop de Sistemas Disbribuidos y Paralelismo, 2000, Santiago. Workshop de Sistemas Distribuidos y Paralelismo. , 2000.

FRANCO, D., CARRO, L. FPGA architecture comparison for non-conventional signal processing In: IEEE-INSS-ENNS Internation Joint Conference on Neural Networks, 2000, Como. . , 2000.

CARRO, L., SOUZA JR, A., NEGREIROS, M., JAHN, G., FRANCO, D. Non-linear components for mixed circuits analog front-end In: Design, Automation and test in Europe, 2000, Paris. DATE-Conference. Los Alamitos, Californa: IEEE Computer Society Press, 2000. v.1. p.544 - 549

COTA, E., CARRO, L., RENOVELL, M., LUBASZEWSKI, M., BERTRAND, Y., AZAIS, F. Reuse of existing resources for analog BIST of a Swithing capacitor filter In: DATE2000-Design, Automation and Test in Europe, 2000, Paris. DATE Conference 2000 - proceedings. Los Alamitos, California: IEEE Computer Society Press, 2000. v.1. p.226 - 230

ITO, S., CARRO, L., JACOBI, R. System Design Based on Single Language and Single-Chip JAVA ASIP Microcontroller In: Date- Design, Automation and Test in Europe, 2000, Paris. DATE Conference 2000 proceedings. Los Alamitos, California: IEEE Computer Society Press, 2000. v.1. p.703 - 707

CARRO, L., KREUTZ, M., WAGNER, F., OYAMADA, M. System Synthesisfor Multiprocessor Embedded Applications In: DATE2000 - Design, Automation and Test in Europe, 2000, Paris. DATE-Conference proceedings. Los Alamitos, California: IEEE Computer Society Press, 2000. v.1. p.697 - 702

CARRO, L., COTA, �., LUBASZEWSKI, M., BERTRAND, Y., AZA�S, F., RENOVELL, M. TI-BIST: A temperature Independent Analog BIST for Switched-Capacitor filters In: Asian Test Symposium, 2000, Taipei. ATS Proceedings. Los Alamitos: IEEE Computer Society, 2000.

CARRO, L., AGOSTINI, L., PACHECO, R., LUBASZEWSKI, M. Using reconfigurability to break down test costs: a case study In: 1st Latin-American Test Workshop, 2000, Rio de Janeiro. LATW2000. Los Alamitos, California: IEEE Computer Society Press, 2000. p.209 - 214

VARGAS, H., MACHADO, R., CARRO, L. Virtual-Real Lab: An Electronics laboratory using real devices and the Internet In: M/SET 2000, Mathematics, Science and Education and Technology, 2000, San Diego. International Conference on M/SET 2000, Mathematics, Science and Education and Technology. Charlottesville, VA: AACE: Association for the Advancement of Computing in Education, 2000. v.1.

LIMA, F. G., DAVILA, E., MORAES, M., LUBASZEWSKI, M. S., REIS, R. A Self-Testing Mask Programmable Matrix using Built-In Current Sensing In: IEEE Latin-American Test Workshop, 2000, Rio de Janeiro. LATW2000 - 1st Latin-American Test Workshop. , 2000. p.15 - 19

ALVES, G. C., LUBASZEWSKI, M. S., KRUG, M. R., FERREIRA, J. M. M. An Automated Verfication process based on Scan Techniques In: Baltic Electronics Conference, 2000, Tallin, Estonia. BEC2000 - 7th Biennial Baltic Electronics Conference. , 2000.

LIMA, F. G., COTA, E., CARRO, L., REIS, R., LUBASZEWSKI, M. S., VELAZCO, R., REZGUI, S. Designing a Radiation Hardened 8051-like Micro-controller In: SBC Symposium on Integrated Circuits and Systems Design, 2000, Manaus. SBCCI2000 - XIII Symposium on Integrated Circuits and Systems Design. Los Alamitos - CA, EUA: IEEE Computer Society Press, 2000.

LIMA, F. G., COTA, E., CARRO, L., REIS, R., LUBASZEWSKI, M. S., REZGUI, S., VELAZCO, R. Designing and Testing a Radiation Hardened 8051-like Micro-controller In: Military and Aerospace Applications of Programmable Devices and Technologies International, 2000, Laurel - MA, EUA. MAPLD 2000 - Military and Aerospace Applications of Programmable Devices and Technologies International. , 2000.

CALVANO, J. V., ALVES, V. C., LUBASZEWSKI, M. S. Fault Detection Methodology and BIST Method for 2nd Order Butterworth, Chebyshev and Bessel Filter Approximations In: IEEE VLSI Test Symposium, 2000, Montreal, Canad�. IEEE VLSI Test Symposium Proceedings. Los Alamitos - CA, USA: IEEE Computer Society Press, 2000.

CALVANO, J. V., ALVES, V. C., LUBASZEWSKI, M. S. Fault Models and Compact Test Vectors for MOS OpAmp Circuits In: SBC Symposium on Integrated Circuits and Systems Design, 2000, Manaus. SBCCI2000 - XIII Symposium on Integrated Circuits and Systems Design. Los Alamitos - CA, EUA: IEEE Computer Society Press, 2000.

CALVANO, J. V., ALVES, V. C., LUBASZEWSKI, M. S. Fault Models and Compact Test Vectors for MOS Opamp Circuits In: IEEE Mixed-Signal Testing Workshop, 2000, Montpellier, Fran�a. IMSTW2000 - IEEE TTTC International Mixed-Signal Testing Workshop. , 2000.

ALVES, G. C., LUBASZEWSKI, M. S., KRUG, M. R., FERREIRA, J. M. M. From Circuit Simulation to Circuit Verification: An Internal Boundary Scan Solution In: IEEE European Test Workshop, 2000, Cascais. IEEE European Test Workshop. , 2000.

REIS, A., PRADO, A., LUBASZEWSKI, M. S. Identifying Stuck-at Faults with Vertex Precedent BDDs In: 15th Conference on Design of Circuits and Integrated Systems, 2000, Montpellier.15th Conference on Design of Circuits and Integrated Systems. , 2000.

REIS, A., PRADO, A., LUBASZEWSKI, M. S. Identifying Stuck-at Faults with Vertex Precedent BDDs In: International Workshop on Logic Synthesis, 2000, Dana Point, CA. IEEE IWLS 2000 - International Workshop on Logic Synthesis 2000. , 2000. p.41 - 50

COTA, �. F., CARRO, L., RENOVELL, M., LUBASZEWSKI, M. S., AZA�S, F., BERTRAND, Y. Reuse of Existing Resources for Analog BIST of a Switch Capacitor Filter In: Design, Automation and Test in Europe Conference - DATE2000, 2000, Paris, Fran�a. Design, Automation and Test in Europe Conference and Exhibition 2000. Los Alamitos - CA, USA: IEEE Computer Society Press, 2000. p.226 - 230

CARRO, L., COTA, E., LUBASZEWSKI, M. S., BERTRAND, Y., AZA�S, F., RENOVELL, M. TI-BIST: A Temperature Independent Analog BIST for Switched-Capacitor Filters In: IEEE Asian Test Symposium, 2000, Taipei, Taiwan. ATS2000 - IEEE TTTC Asian Test Symposium. Los Alamitos - CA, EUA: IEEE Computer Society Press, 2000.

REIS, A., PRADO, A., LUBASZEWSKI, M. S. Testability Properties of Vertex Precedent BDDs In: SBC Symposium on Integrated Circuits and Systems Design, 2000, Manaus. SBCCI2000 - XIII Symposium on Integrated Circuits and Systems Design. Los Alamitos - CA, EUA: IEEE Computer Society Press, 2000.

CALVANO, J. V., ALVES, V. C., LUBASZEWSKI, M. S. Testing a PWM Circuit Using Functional Fault Models and Compact Test Vectors for Operational Amplifiers In: IEEE Asian Test Symposium, 2000, Taipei, Taiwan. ATS2000 - IEEE TTTC Asian Test Symposium. Los Alamitos - CA, EUA: IEEE Computer Society Press, 2000. Palavras-chave : Amplificadores Operacionais, Modelo de falhas, Geracao de Estimulos de Teste

LIMA, F. G., BARCELOS, M., ROCHOL, J., BAMPI, S., REIS, R. A. L. A Frame Stream Controller IP In: IEEE International Symposium on Circuits and Systems - ISCAS2000, 2000, Genebra. Proceedings of the IEEE International Symposium on Circuits and Systems. IEEE Circuits and System Society, 2000.

JOHANN, M. O., CADWELL, A., KAHNG, A., REIS, R. A. L. A New Bidirectional Heuristic Shortest path search Algorithm In: International ICSC Congress on Artificial Intelligence and Aplications, 2000, Wollongong. International ICSC Congress on Artificial Intelligence and Aplications. , 2000. v.1.

MORAIS, C. T., MACHADO, J., MENEZES, P. B., REIS, R. A. L. A Web Teaching System Based on Formal Methods In: IFIP International conference on Educational Uses of Communication and Information Technologies, 2000, Beijing. Proceedings of ICEUT2000. Laxenburg: IFIP, 2000. v.1.

MARTINS, J. B., MONTEIRO, J. C., REIS, R. A. L. Accurate Modeling of capacitance and Power in Logic Level In: ACM International Workshop on Logic Synthesis, 2000, Dana Point. Proceedings of the International Workshop on Logic Synthesis. IEEE Computer Society, 2000.

MAYER, U., HOLLSTEIN, T., BECKER, J., GLESNER, M., INDRUSIAK, L., REIS, R. A. L. An Internet-Capable CAD Suite for the Multi-Level Design of Complex Microelectronic Systems In: DATE2000 - IEEE Design Automation and Test in Europe, 2000, Paris. DATE2000 - IEEE Design Automation and Test in Europe. IEEE Computer Society, 2000.

MARTINS, J. B., MONTEIRO, J. C., REIS, R. A. L. Capacitance and Power Modeling at Logic-Level In: IFIP ICDA - International Conference on Chip Design, 2000, Beijing. Proceedings of the International Conference on Chip Design. Laxenburg: IFIP, 2000. v.1.

LIMA, F. G., COTA, �. F., CARRO, L., LUBASZEWSKI, M., REIS, R. A. L., VELAZCO, R., REZGUI, S. Designing a Radiation Hardened 8051-like Micro-controller In: 13th Symposium on Integrated Circuits and Systems Design, 2000, Manaus. 13th Symposium on Integrated Circuits and Systems Design. Los Alamitos: IEEE Computer Society Press, 2000. v.13. p.255 - 260

LIMA, F., COSTA, E., CARRO, L., LUBASZEWSKI, M., REIS, R. A. L., REZGUI, S., VELAZCO, R. Designing and Testing a Radiation hardened 8051-like Micro-Controller In: 3rd Military and Aerospace Applications of Programmable Devices and Technologies International Conference, 2000, Maryland. 3rd Military and Aerospace Applications of Programmable Devices and Technologies International Conference. , 2000. v.1.

FERREIRA, F., MORAES, F. G., REIS, R. A. LFast Interconnect Parasitic Extraction in Deep Submicron Using Bin-Based Algorithm In: 43th IEEE Midwest Symposium on Circuits and Systems, 2000, Michigan. 43th IEEE Midwest Symposium on Circuits and Systems. IEEE, 2000.

FERREIRA, F., MORAES, Fernando, REIS, R. A. L. LASCA - Interconnect Parasitic Extraction Tool for Deep-Submicron IC Design In: 13th Symposium on Integrated Circuits and Systems Design, 2000, Manaus. Symposium on Integrated Circuits and Systems Design. Los Alamitos: IEEE Computer Society Press, 2000. v.13. p.327 - 332

JOHANN, M., REIS, R. A. L. Net by Net Routing with a New Path Search Algorithm In: 13th Symposium on Integrated Circuits and Systems Design, 2000, Manaus. 13th Symposium on Integrated Circuits and Systems Design. Los Alamitos: IEEE Computer Society Press, 2000. v.13. p.144 - 149

BECKER, J., MAYER, U., GLESNER, M., INDRUSIAK, L., REIS, R. A. L. Providing Flexiblel Internet for FPGA-Based CAD Courses In: EWME2000 - European Workshop on Microelectronics Education, 2000, Aix-en-Provence. Proceedings of the European Workshop on Microelectronics Education. , 2000. v.3.

STEMMER, G., Luciano Agostini, PRADO, A., PACHECO, R., CAMPOS, T., BAMPI, S., REIS, R. A. L. SisECO: Design of an Echo-Canceling IC for Base Band Modens In: 13th Symposium on Integrated Circuits and Systems Design, 2000, Manaus. 13th Symposium on Integrated Circuits and Systems Design. Los Alamitos: IEEE Computer Society Press, 2000. v.13. p.216 - 221

MACHADO, J., MORAIS, C. T., MENEZES, P. B., REIS, R. A. L. Structuring Web Course Pages as Automata: Revising Concepts In: RIAO2000- Computer-Assisted Information Retrieval, 2000, Paris. RIAO2000 - Computer-Assisted Information Retrieval. , 2000.

FRAGOSO, J. L., MORAES, Fernando, REIS, R. A. L. WTROPIC: a Macro-cell Generator on World Wide Web In: 13th Symposium on Integrated Circuits and Systems Design, 2000, Manaus. 13th Symposium on Integrated Circuits and Systems Design. Los Alamitos: IEEE Computer Society Press, 2000. v.13. p.133 - 138

L.CARRO, M.KREUTZ, F.R.WAGNER, M.OYAMADA A Design Methodology for Embedded Systems Based on Multiple Processors In: DIPES'2000 - IFIP Workshop on Distributed and Parallel Embedded Systems, 2000, Schloss Eringerfeld. Architecture and Design of Distributed Embedded Systems. Boston: Kluwer Academic Publishers, 2000. v.1. p.33 - 42

M.OYAMADA, F.R.WAGNER Co-simulation of embedded electronic systems In: ESS'2000 - 12nd European Simulation Symposium, 2000, Hamburgo. ESS'2000 - 12nd European Simulation Symposium. Bruxelas: Society for Computer Simulation, 2000. v.1.

L.CARRO, M.KREUTZ, F.R.WAGNER, M.OYAMADA System Synthesis for Multiprocessor Embedded Applications In: DATE'2000 - Design Automation and Test in Europe, 2000, Paris. DATE'2000 - Design Automation and Test in Europe. Los Alamitos, USA: IEEE Computer Society Press, 2000. v.1. p.697 - 702

Capítulos de Livros ↑ Voltar ao topo

NACUL, A., CARRO, L., JANNER, D., LUBASZEWSKI, M. S. Built-In Test of Analog Non-Linear Circuits in a SOC Environment In: VLSI-SOC ed.Dordrecht : Kluwer Academic Publishers, 2002

LUBASZEWSKI, M. S. Test and Design-For-Test: From Circuits To Integrated Systems In: Design of Systems on a Chip: Design & Test.1 ed.Dordrecht, Holanda : Kluwer Academic Publishers, 2002 Palavras-chave : Projeto Visando O Teste, Teste e Testabilidade

CORREIA, V. P., REIS, A. I. A tutorial tool for switch logic In: 2001 International conference on microelectronics system education, 2001, Las Vegas, Nevada - USA. MSE'01 Proceedings. Los alamitos, california: ieee computer society, 2001. p.28 - 29

BARBOSA, F. R., TURATTI, N., RIBAS, R. P. EMBRYO: Didactic Module for Designing Integrated Circuits using Mentor Graphics Environment: Full-Custom Layout In: VII Workshop IBERCHIP, 2001, Montevideo. VII Workshop IBERCHIP Proceedings. , 2001. p.54 - 54.

RIBAS, R. P., LESCOT, J., LECLERCQ, J., COURTOIS, B. Thermal and Mechanical Evaluation of Micromachined Planar Spiral Inductors In: Simposium on Design, test and Microfabrication of MEMS and MOEMS, 2001, Cannes Mandelieu. Simposyum on Design, test and Microfabrication of MEMS and MOEMS Proceedings. , 2001.

TOGNI, J. D., REIS, A. I., RIBAS, R. P. WEB-Based Automatic Layout Generation Tool with Visualization Features In: VII Workshop IBERCHIP, 2001, Montevideo. VII Workshop IBERCHIP Proceedings. , 2001. p.56 - 56

TOGNI, J. D., REIS, A. I., RIBAS, R. P. WEB-Based Automatic Layout Generation Tool with Visualization Features In: XVI International Conference on Microelectronics and Packaging, 2001, Piren�polis - GO. Proceedings of XVI International Conference on Microelectronics and Packaging. , 2001. p.41 -

REIS, R., REIS, A. I. Ferramentas de CAD In: Sistemas Digitales.1 ed.Bogot� D.C., Colombia : Ediciones Uniandes, 2000

REIS, A. I. S�ntese L�gica In: Sistemas Digitales: S�ntese F�sica de Circuitos Integrados.1 ed.Bogot� D.C., Colombia : Ediciones Uniandes, 2000

REIS, A. I., PRADO, A., LUBASZEWSKI, M. Identifying Stuck-at Faults with Vertex Precedent BDDs In: ACM/IEEE International Workshop on Logic Synthesis, 2000, Dana Point, CA, USA. Workshop Notes of the 2000 IEEE/ACM International Workshop on Logic Synthesis. , 2000. p.41 � 50

REIS, A. I., PRADO, A., LUBASZEWSKI, M. Identifying and Removing Non-Testable Stuck-at Faults with Vertex Precedent BDDs In: XV Conference on Design of Circuits and Integrated Systems, Montpellier. Proceedings of the XV Conference on Design of Circuits and Integrated Systems. , 2000.

REIS, A. I. Power Consumption of Circuits Using CMOS Complex Gates In: XV Conference on Design of Integrated Circuits and Systems, 2000, Montpellier. Proceedings of the XV Conference on Design of Integrated Circuits and Systems. , 2000.

REIS, A. I. Reducing Power Consumption by Using CMOS Complex Gates In: ACM/IEE International Workshop on Logic Synthesis, 2000, Dana Point, CA, USA. Workshop Notes of The 2000 ACM/IEEE Workshop on Logic Synthesis. , 2000. p.207 - 216

REIS, A. I., PRADO, A., LUBASZEWSKI, M. Testability Properties of Vertex Precedent BDDs In: Symposium on Integrated Circuits and System Design, 2000, Manaus - AM. Proceedings of the 13th Symposium on Integrated Circuits and System Design. Los Alamitos, CA, USA: IEEE Computer Society, 2000. p.15 - 20

LIMA, F. G., JOHANN, M. O., GUNTZEL, J., GIFFONI, E. E., CARRO, L., REIS, R. A. L. Designing a Mask Programmable for Sequencial Circuits In: VLSI: Systems on a Chip ed.Boston : Kluwer, 2000

Nacional


Publicações em Periódicos Publicações em Congressos Livros Capítulos de Livros Revistas Conferências Outros

Publicações em Periódicos ↑ Voltar ao topo

GUIMAR�ES, L. V., SUZIM, A. A., MAEDA, J. A Circle Similarity Algorithm for an Automatic Circular Decomposition of Blood Cell Images. Optical Review. jap�o: , v.8, n.6, p.436 - 443, 2001.

SOUZA, F. P. C., SUZIM, A. A. Uma T�cnica para Localiza��o R�pida de Placas de Ve��culos In: V SBAI - V Simp�sio Brasileiro de Automa��o Inteligente, 2001, Canela. Anais do V Simp�sio Brasileiro de Automa��o Inteligente. , 2001. p.1 - 5

RIBAS, R. P., REIS, A. I., LUBASZEWSKI, M. S. Concep��o de circuitos e sistemas integrados. Revista de Informatica Te�rica e Aplicada. Porto Alegre: , v.viii, n.i, p.7 - 21, 2001.

RIBAS, R., REIS, A., LUBASZEWSKI, M. S. Concep��o de Circuitos e Sistemas Integrados. Revista de Informatica Te�rica e Aplicada. Porto Alegre: , v.VIII, n.I, p.7 - 22, 2001.

RIBAS, R. P., REIS, A. I., LUBASZEWSKI, M. Concep��o de Circuitos e Sistemas Integrados. Revista de Informatica Te�rica e Aplicada. Porto Alegre: , v.VIII, n.1, p.7 - 22, 2001.

LIMA, F. G., G�NTZEL, J. L. A. Componentes Program�veis In: 2a Escola de Microeletr�nica da SBC-Sul ed.Canoas : Editora da ULBRA - Universidade Luterana do Brasil, 2000

G�NTZEL, J. L. A. Estilos de Projeto In: Concep��o de Circuitos Integrados.1 ed.Porto Alegre : Sagra-Luzzato, 2000.

G�NTZEL, J. L. A., REIS, R. A. L., MARCHIORO, G. F. 2a Escola de Microeletr�nica da SBC - Sul, 2000 p.110. REIS, R. A. L., G�NTZEL, J. L. A. XV Microelectronics Seminar - SIM2000, 2000 p.165.

FRAGOSO, J. L., COSTA, E., ROCHOL, J., BAMPI, S., REIS, R. A. L. Specification and Design of an Ethernet Interface Soft IP. Journal of the Brazilian Computer Society. Campinas: , v.6, n.3, p.5 - 12, 2000.

Publicações em Congressos ↑ Voltar ao topo

GUNTZEL, J. L., WILKE, G., BYSTRONSKI, M., MEDINA, A. C., REIS, R. A. L. A Comparison Between Testability Measures Applied to Complex Gates In: 3 Latin- American Test Workshop - LATW, 2002, Montevideu. Proceedings LATW2002. , 2002. v.1. p.144 - 149

NACUL, A., CARRO, L., JANNER, A., LUBASZEWSKI, M. A BIST Procedure for Analog Mixers in Software Radio In: SBCCI 2001, 2001, Brasilia. A BIST Procedure for Analog Mixers in Software Radio. Los Alamitos: IEEE Computer Society Press, 2001. v.1. p.103 - 108

KREUTZ, M., CARRO, L., ZEFERINO, C., SUZIM, A. Communication Architectures for System-on-Chip In: SBCCI 2001, 2001, Brasilia. Communication Architectures for System-On-Chip. Los Alamitos: IEEE Computer Society Press, 2001. v.1. p.14 - 19

ZIMMERMANN, F. L. O., SUZIM, A. A. A Microprocessor with analog capabilities In: SIM 2000 XV Microeletronics Seminar SIM 2000 XV Microeletronics Seminar. Canoas: Grafica da ULBRA, 2000. v.1. p.83 �" 86.

BERTASI, D., ZIMMERMANN, F. L. O., CARRO, L., SUZIM, A. A. Comparacao de Implementacoes de um filtro Biquad In: VI WORKSHOP IBERCHIP, 2000, São Paulo. VI Workshop IBERCHIP ANAIS. , 2000. p.104 - 112

FLORES FILHO, A . F., SUZIM, A. A., SILVEIRA, M. A. Determination of the Forces in a Novel Electromagnetic Planar Actuator In: INDUSCON 2000 IV Confer�ncia de Aplica��es Idustriais, 2000, Porto Alegre. INDUSCON 2000 IV Confer�ncia de Aplica��es Industriais. , 2000.

ZIMMERMANN, F. L. O., BERTASI, D., AGOSTINI, L., PACHECO, R. V., SUZIM, A. A., CARRO,L. Estudo de COREs a partir de uma Arquitetura Parte Operativa 2901 In: VI WORKSHOP IBERCHIP, 2000, S�o Paulo. VI Workshop Iberchip Anais. , 2000. p.563 - 572

SUZIM, A. A., SCHWANKE, D., DOLGANOV, A. Estudo de um Sistema de Baixo Custo Utilizando DSP para a Medi��o de Potenciais Evocados Auditivos In: F�RUM NACIONAL DE CI�NCIA E TECNOLOGIA EM SA�DE, 2000, Curitiba. F�RUM NACIONAL DE CI�NCIA E TECNOLOGIA EM SA�DE Anais. , 2000.

SCHWANKE, D., SUZIM, A. A. Obten��o de uma Base Instrumental para Exames de PEA Utilizando o ADSP2181 In: Trabalho Individual, 1999, Porto Alegre.. , 2000.

SOUZA, F. P. C., SUZIM, A. A. SIAV - Um Sistema de Identifica��o Autom�tica de Ve��culos In: XIII Congresso Brasileiro de Autom�tica CBA 2000, 2000, Florian�polis. Anais do XIII Congresso Brasileiro de Autom�tica CBA 2000. Florian�polis: Universidade de Sta Catarina, 2000. v.1. p.1377 - 1380

ZIMMERMANN, F. L. O., SUZIM, A. A. Um Microprocessador com capacidades anal�gicas In: SEMANA ACAD�MICA 2000, 2000, Porto Alegre. SEMANA ACAD�MICA 2000. , 2000. v.1.

G�NTZEL, J. L. A., PINTO, A. C. M., D'�VILA, E., REIS, R. A. L. ATG-Based Timing Analysis of Circuits Containing Complex Gates In: Symposium on Integrated Circuits and Systems Design, 2000, Manaus. Symposium on Integrated Circuits and Systems Design. Los Alamitos: IEEE Computer Society, 2000. p.21 - 26Prof. Dr. Luigi Carro

CARRO, L., ITO, S. A. A Comparison of Microcontrollers Targeted to FPGA-based Embedded Applications In: Symposium on Integrated Circuits and Systems Design, 13, 2000, Manaus. A Comparison of Microcontrollers Targeted to FPGA-based Embedded Applications. Los Alamitos: IEEE Computer Society, 2000. v.1. p.397 - 402

CARRO, L., ITO, S. A., MATTOS, J. A Comparison of OO and Reactive Based Specifications on the Design of Embedded Systems In: Symposium on Integrated Circuits and Systems Design, 13, 2000, Manaus. A Comparison of OO and Reactive Based Specifications on the Design of Embedded Systems. Los Alamitos: IEEE Computer Society, 2000. v.1. p.391 - 396

LIMA, F. G., COTA, �., CARRO, L., REZGUI, S., VELAZCO, R., LUBASZEWSKI, M., REIS, R. Designing a Radiation Hardened 8051-like Microcontroller In: Symposium on Integrated Circuits and Systems Design, 2000, Manaus. Proceedings. Los Alamitos: IEEE Computer Society Press, 2000.

COSTA, E., CORTES, F. P., CARDOSO, R., CARRO, L., BAMPI, S. Modeling of Short Circuit Power Consumption Using Timing-Only Logic Cell Macromodels In: Symposium on Integrated Circuits and Systems Design, 13, 2000, Manaus. Proceedings. Los Alamitos: IEEE Computer Society, 2000.

CARRO, L., RENOVELL, M., COTA, E., LUBASZEWSKI, M., BERTRAND, Y., AZAIS, F. On the Temperature Dependencies of Analog Bist In: 1st Latin-American Test Workshop, 2000, Rio de Janeiro. LATW2000. Los Alamitos, Californa: IEEE Computer Society Press, 2000. p.88 - 94

COTA, E., CARRO, L., LUBASZEWSKI, M., VELAZCO, R., REZGUI, S. Synthesis of a 8051-Like Microcontroller Tolerant to Transient Faults In: 1st Latin-American Test Workshop, 2000, Rio de Janeiro. LATW2000. Los Alamitos, California: IEEE Computer Society Press, 2000. p.134 - 139

KRUG, M. R., LUBASZEWSKI, M. S., FERREIRA, J. M. M., ALVES, G. C. Implementing a Self-Checking PROFIBUS Slave In: IEEE Latin-American Test Workshop, 2000, Rio de Janeiro. LATW2000 - 1st Latin-American Test Workshop. , 2000. p.4 - 8

CARRO, L., RENOVELL, M., COTA, E., LUBASZEWSKI, M. S., BERTRAND, Y., AZA�S, F. On the Temperature Dependencies of Analog BIST In: IEEE Latin-American Test Workshop, 2000, Rio de Janeiro. LATW2000 - 1st Latin-American Test Workshop. , 2000. p.88 - 93

COTA, E., CARRO, L., LUBASZEWSKI, M. S., VELAZCO, R., REZGUI, S. Synthesis of a 8051-like Microcontroller Tolerant to Transient Faults In: IEEE Latin-American Test Workshop, 2000, Rio de Janeiro. LATW2000 - 1st Latin-American Test Workshop. , 2000. p.134 - 139

CALVANO, J. V., ALVES, V. C., LUBASZEWSKI, M. S. The Use of Macromodels on Op-Amp Circuits Fault Modeling In: IEEE Latin-American Test Workshop, 2000, Rio de Janeiro. LATW2000 - 1st Latin-American Test Workshop. , 2000. p.188 - 192

CARRO, L., AGOSTINI, L., PACHECO, R., LUBASZEWSKI, M. S. Using Reconfigurability Features to Break Down Test Costs: a Case Study In: IEEE Latin-American Test Workshop, 2000, Rio de Janeiro. LATW2000 - 1st Latin-American Test Workshop. , 2000. p.209 � 214.

LIMA, F. G., LUBASZEWSKI, M., REIS, R. A. L. A Self-Testing mask Programmable Matrix Using Built-In Curent Sensing In: IEEE Latin-American Test Workshop - LATW2000, 2000, Rio deJaneiro. IEEE Latin-American Test Workshop - LATW2000. IEEE Computer Society, 2000. v.1. p.15 - 19 Palavras-chave : SElf-Testing, Ic Design, Programmable Circuits, Vlsi

GUNTZEL, J., PINTO, A., DAVILA, E., REIS, R. A. L. ATG-Based Timing Analysis of Circuits Containing Complex Gates In: 13th Symposium on Integrated Circuits and Systems Design, 2000, Manaus. 13th Symposium on Integrated Circuits and Systems Design. Manaus: IEEE Computer Society Press, 2000. v.13. p.21 - 26

JOHANN, M., CADWELL, A., KAHNG, A., REIS, R. A. L. Admissibility Proofs for the LCS* Algorithm In: 15th Brazilian Artificial Intelligence Symposium, 2000, Campos do Jordao. Lecture Notes in Artificial Intelligence. Springer-Verlag, 2000. p.236 - 244

MENDEZ, R., REIS, R. A. L. Aplica��o de T�cnicas de Realidade Virtual em Estudos do Patrim�nio Arquitet�nico na Pra�a Central de Pelotas In: WRV2000 - 3rd Workshop on Virtual Reality, 2000, Gramado. WRV2000 - 3rd Workshop on Virtual Reality. Porto Alegre: SBC, 2000. v.3. p.13 - 23

JOHANN, M., CARRO, L., REIS, R. A. L. Automatic Master-Slice Generation with Garota In: 6th Workshop Iberchip, 2000, S�o Paulo. 6th Workshop Iberchip. IBERCHIP, 2000. v.6.

MARTINS, J. B., MONTEIRO, J. C., REIS, R. A. L. Estima��o de capacit�ncias e Pot~encia de cicruitos CMOS a N�vel L�gico In: 6th Workshop Iberchip, 2000, S�o Paulo. 6th Workshop Iberchip. Barcelona: IBERCHIP, 2000. v.6. p.70 - 79

INDRUSIAK, L., REIS, R. A. L. From a Hyperdocument-Centric to an Object-Oriented Approach for the Cave Project In: 13th Symposium on Integrated Circuits and Systems Design, 2000, Manaus. Symposium on Integrated Circuits and Systems Design. Manaus: IEEE Computer Society, 2000. p.125 - 130

MARTINS, J. B., FERREIRA, F., MORAES, F. G., REIS, R. A. L. Power Estimation at Logic-level Considering Interconnection Capacitances In: SBMicro2000- 15th International Conference on Microelectronics and Packaging, 2000, Manaus. SBMicro2000- 15th International Conference on Microelectronics and Packaging. S�o Paulo: SBMicro, 2000. v.15. p.226 - 230

PRADO, A., STEMMER, G., Luciano Agostini, CAMPOS, T., PACHECO, R., REIS, R. A. L., BAMPI, S. Projeto de um Circuito Integrador Cancelador de Eco - SISECO In: 6th Workshop Iberchip, 2000, S�o Paulo. 6th Workshop Iberchip. Barcelona: IBERCHIP, 2000. v.6. p.307 - 316 Palavras-chave : Communications, Microelectronics, VLSI Design

G.R.RODRIGUES, D.BECKER, F.R.WAGNER CSDSim: A Didactic Processor Simulation Environment Based on the Client / Server Architecture In: SBAC-PAD'2000 - 12th Symposium on Computer Architecture and High Performance Computing, 2000, S�o Pedro, SP. PROCEEDINGS. S�o Carlos, SP: SBC / UFSCar / USP, 2000. v.1. p.287 - 294

S.N.SOARES, F.R.WAGNER Uma An�lise de Ferramentas de Software para o Ensino de Organiza��o e Arquitetura de Computadores In: International Conference on Engineering and Computer Education, 2000, S�o Paulo. International Conference on Engineering and Computer Education. S�o Paulo: SENAC-SP e IEEE Education Society, 2000.

Livros ↑ Voltar ao topo

CARRO, L. Projeto de Prototipa��o de Sistemas Digitais, 2001 p.234.

REIS, R. A. L. Concep��o de Circuitos Integrados.1 ed. Porto Alegre : Editora Sagra, 2000, v.1. p.252.

Capítulos de Livros ↑ Voltar ao topo

TOGNI, J. D., REIS, A. I., RIBAS, R. P. WEB-based automatic layout generation tool with visualization tools In: SBMICRO 2001 - XVI International Conference on Microelectronics and packaging, 2001, Piren�polis - Goi�s. SBMICRO 2001 Proceedings. , 2001. p.41 - 49

RIBAS, R. P. Microssistemas Integrados (MEMS) In: Sistemas Digitales - S�ntese F�sica de Circuitos Integrados ed.Bogota D.C. : Ediciones Uniandes, 2000.Artigos Publicados em CongressosTOGNI, J. D., REIS, A. I., RIBAS, R. P. A Portable Environment for Lyout Generator In: XVI Microelectronics Seminar, 2001, Santa Maria - RS. Proceedings of XVI Microelectronics Seminar. , 2001. p.57 � 60.

BARBOSA, F. R., TURATTI, N., RIBAS, R. P. EMBRYO - Didactic Module for Designing Integrated Circuits using Mentor Graphics Environment: Layout-Level Design In: XVI Microelectronics Seminar, 2001, Santa Maria - RS. Proceedings of XVI Microelectronics Seminar. , 2001. p.61 � 66.

REIS, R., REIS, A. I. Ferramentas de CAD In: Concep��o de Circuitos Integrados.1 ed.Porto Alegre : Editora Sagra Luzzato, 2000

REIS, A. I. S�ntese L�gica In: Concep��o de Circuitos Integrados ed.Porto Alegre : Editora Sagra Luzzato, 2000

PRADO, A., LUBASZEWSKI, M., REIS, A. I. Identifying Stuck-at Faults with Vertex Precedent BDDs In: VI Workshop Iberchip, 2000, S�o Paulo. Proceedings of the VI Workshop Iberchip. , 2000. p.235 � 244.

REIS, A. I. Reducing Power Consumption by Using Static CMOS Complex Gates In: VI Workshop Iberchip, 2000, S�o Paulo. Proceedings of the VI Workshop Iberchip. , 2000. p.361 - 370

LUBASZEWSKI, M. S., COTA, �. F., KRUG, M. R. Teste e Projeto Visando o Teste de Circuitos e Sistemas Integrados In: Concep��o de Circuitos Integrados.1 ed.Porto Alegre, RS : Editora Sagra Luzzato, 2000

DANILOV, I., RIBAS, R. P., SWART, J., DANILOVA, T., LARA, D. S., SOTERO, A. P. Post-Etching Characterization for Front-Side Bulk Micromachining In: XV International Conference on Microelectronics and Packaging - SBMicro, 2000, Manaus. XV International Conference on Microelectronics and Packaging Proceedings. , 2000. p.262 - 267

AOYAMA, R., FINCO, S., RIBAS, R. P. Projeto e Simula��o de Estrutura Comb-Drive para Aceler�metros e Atuadores Mec�nicos In: Workshop Iberchip, 2000, S�o Paulo. Anais do VI Workshop Iberchip. , 2000. p.324 � 333.

RIBAS, R. P., GARCIA, R. P., BEHRENS, F. H. Thermal Library for MEMS Simulation Using Equivalent Electrical Circuit Models In: XV International Conference on Microelectronics and Packaging - SBMicro, 2000, Manaus. XV International Conference on Microelectronics and Packaging Proceedings. , 2000. p.394 � 398

Revistas ↑ Voltar ao topo

MAR�AL, R. F. M., NEGREIROS, M., SUZIM, A. A., KOVALESKI, J. L. Detecting Faults in Rotating Machines. Ieee Instrumentation Measurement Magazine. New York-USA:v.3, n.4, p.24 - 26, 2000.

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